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89
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ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
15 years 4 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
VAMOS
2010
Springer
14 years 11 months ago
Leveraging Aspect-Connectors to Improve Stability of Product-Line Variabilities
Abstract--One of the design goals of Product Line Architectures (PLAs) is to remain stable while accommodating changes of stakeholder's requirements. However, the stability of...
Marcelo Oliveira Dias, Leonardo Tizzei, Ceí...
LCTRTS
2007
Springer
15 years 3 months ago
Integrated CPU and l2 cache voltage scaling using machine learning
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
Nevine AbouGhazaleh, Alexandre Ferreira, Cosmin Ru...
86
Voted
RTAS
2006
IEEE
15 years 3 months ago
Zygaria: Storage Performance as a Managed Resource
Large-scale storage systems often hold data for multiple applications and users. A problem in such systems is isolating applications and users from each other to prevent their wor...
Theodore M. Wong, Richard A. Golding, Caixue Lin, ...
DATE
2007
IEEE
136views Hardware» more  DATE 2007»
15 years 4 months ago
Compositional specification of behavioral semantics
An emerging common trend in model-based design of embedded software and systems is the adoption of Domain-Specific Modeling Languages (DSMLs). While syntax metamodeling enables th...
Kai Chen 0003, Janos Sztipanovits, Sandeep Neema