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VTS
2006
IEEE
122views Hardware» more  VTS 2006»
15 years 7 months ago
Mixed PLB and Interconnect BIST for FPGAs Without Fault-Free Assumptions
We tackle the problem of fault-free assumptions in current PLB and interconnect built-in-self-test (BIST) techniques for FPGAs. These assumptions were made in order to develop stro...
Vishal Suthar, Shantanu Dutt
SIGCOMM
2006
ACM
15 years 7 months ago
Algorithms to accelerate multiple regular expressions matching for deep packet inspection
There is a growing demand for network devices capable of examining the content of data packets in order to improve network security and provide application-specific services. Most...
Sailesh Kumar, Sarang Dharmapurikar, Fang Yu, Patr...
ACISICIS
2005
IEEE
15 years 7 months ago
An Effective Cache Overlapping Storage Structure for SMT Processors
Simultaneous Multithreaded (SMT) processors improve the instruction throughput by allowing fetching and running instructions from several threads simultaneously at a single cycle....
Liqiang He, Zhiyong Liu
COMPSAC
2005
IEEE
15 years 7 months ago
Two Variations to the mCESG Pollsterless E-Voting Scheme
— Over the past several years, the UK Government has piloted several new voting technologies during local authority elections. The mCESG pollsterless Remote Electronic Voting (RE...
Tim Storer, Ishbel Duncan
ISLPED
2005
ACM
122views Hardware» more  ISLPED 2005»
15 years 7 months ago
A simple mechanism to adapt leakage-control policies to temperature
Leakage power reduction in cache memories continues to be a critical area of research because of the promise of a significant pay-off. Various techniques have been developed so fa...
Stefanos Kaxiras, Polychronis Xekalakis, Georgios ...