38 search results - page 4 / 8 » Using Tweaks to Design Fault Resistant Ciphers |
FSE
2004
Springer
15 years 1 months ago
2004
Springer
Abstract. We present a fast involutional block cipher optimized for reconfigurable hardware implementations. ICEBERG uses 64-bit text blocks and 128-bit keys. All components are in...
DAC
1996
ACM
15 years 1 months ago
1996
ACM
The testability of basic DSP datapath structures using pseudorandom built-in self-test techniques is examined. The addition of variance mismatched signals is identified as a testi...
SACRYPT
2005
Springer
15 years 3 months ago
2005
Springer
A vast amount of literature on stream ciphers is directed to the cryptanalysis of LFSR-based filters and combiners, resulting in various attack models such as distinguishing attac...
116
click to vote
ITC
1997
IEEE
15 years 1 months ago
1997
IEEE
This paper presents a new approach for designing test sequences to be generated on–chip. The proposed technique is based on machine learning, and provides a way to generate effi...
DDECS
2007
IEEE
15 years 3 months ago
2007
IEEE
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...