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» Using hardware transactional memory for data race detection
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PPOPP
2006
ACM
15 years 5 months ago
McRT-STM: a high performance software transactional memory system for a multi-core runtime
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
Bratin Saha, Ali-Reza Adl-Tabatabai, Richard L. Hu...
MICRO
2008
IEEE
118views Hardware» more  MICRO 2008»
15 years 6 months ago
Notary: Hardware techniques to enhance signatures
Hardware signatures have been recently proposed as an efficient mechanism to detect conflicts amongst concurrently running transactions in transactional memory systems (e.g., Bulk...
Luke Yen, Stark C. Draper, Mark D. Hill
PLDI
2009
ACM
15 years 6 months ago
Stretching transactional memory
Transactional memory (TM) is an appealing abstraction for programming multi-core systems. Potential target applications for TM, such as business software and video games, are like...
Aleksandar Dragojevic, Rachid Guerraoui, Michal Ka...
ECOOP
2010
Springer
15 years 4 months ago
Reasoning about the Implementation of Concurrency Abstractions on x86-TSO
ncy Abstractions on x86-TSO Scott Owens University of Cambridge Abstract. With the rise of multi-core processors, shared-memory concurrency has become a widespread feature of compu...
Scott Owens
LCTRTS
2000
Springer
15 years 3 months ago
Reordering Memory Bus Transactions for Reduced Power Consumption
Low energy consumption is becoming the primary design consideration for battery-operated and portable embedded systems, such as personal digital assistants, digital still and movi...
Bruce R. Childers, Tarun Nakra