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MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
15 years 5 months ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
STORAGESS
2005
ACM
15 years 5 months ago
An electric fence for kernel buffers
Improper access of data buffers is one of the most common errors in programs written in assembler, C, C++, and several other languages. Existing programs and OSs frequently acces...
Nikolai Joukov, Aditya Kashyap, Gopalan Sivathanu,...
OOPSLA
2010
Springer
14 years 9 months ago
Composable specifications for structured shared-memory communication
In this paper we propose a communication-centric approach to specifying and checking how multithreaded programs use shared memory to perform inter-thread communication. Our approa...
Benjamin P. Wood, Adrian Sampson, Luis Ceze, Dan G...
DAMON
2006
Springer
15 years 3 months ago
Using secure coprocessors for privacy preserving collaborative data mining and analysis
Secure coprocessors have traditionally been used as a keystone of a security subsystem, eliminating the need to protect the rest of the subsystem with physical security measures. ...
Bishwaranjan Bhattacharjee, Naoki Abe, Kenneth Gol...
ISCA
2012
IEEE
281views Hardware» more  ISCA 2012»
13 years 2 months ago
LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev B...