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» Using hardware transactional memory for data race detection
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DATE
2010
IEEE
122views Hardware» more  DATE 2010»
15 years 2 months ago
SimTag: Exploiting tag bits similarity to improve the reliability of the data caches
— Though tag bits in the data caches are vulnerable to transient errors, few effort has been made to reduce their vulnerability. In this paper, we propose to exploit prevalent sa...
Jesung Kim, Soontae Kim, Yebin Lee
IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
15 years 3 months ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand
ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
12 years 12 months ago
BlockChop: Dynamic squash elimination for hybrid processor architecture
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
Jason Mars, Naveen Kumar
ICCD
2005
IEEE
92views Hardware» more  ICCD 2005»
15 years 6 months ago
Mitigating Soft Errors in Highly Associative Cache with CAM-based Tag
Content Addressable Memories (CAM) are widely used for the tag portions in highly associative caches. Since data are not explicitly read out of tag array in CAM search, the detect...
Luong Dinh Hung, Masahiro Goshima, Shuichi Sakai
CC
2008
Springer
107views System Software» more  CC 2008»
14 years 11 months ago
How to Do a Million Watchpoints: Efficient Debugging Using Dynamic Instrumentation
Application debugging is a tedious but inevitable chore in any software development project. An effective debugger can make programmers more productive by allowing them to pause ex...
Qin Zhao, Rodric M. Rabbah, Saman P. Amarasinghe, ...