Sciweavers

822 search results - page 135 / 165
» Using simulated annealing for producing software architectur...
Sort
View
103
Voted
VLSID
2003
IEEE
103views VLSI» more  VLSID 2003»
16 years 2 months ago
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
IPPS
2000
IEEE
15 years 6 months ago
Fault-Tolerant Distributed-Shared-Memory on a Broadcast-Based Interconnection Network
The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes wit...
Diana Hecht, Constantine Katsinis
106
Voted
HICSS
2003
IEEE
126views Biometrics» more  HICSS 2003»
15 years 7 months ago
Towards a Flexible ICT-Architecture for Multi-Channel E-Government Service Provisioning
The planning and subsequent nationwide implementation of E-government service provisioning faces a number of challenges at the level of municipalities in the Netherlands. Initiati...
Marijn Janssen, René W. Wagenaar, Jaap Beer...
89
Voted
SACMAT
2003
ACM
15 years 6 months ago
Dynamic and risk-aware network access management
Traditional network security technologies such as firewalls and intrusion detection systems usually work according to a static ruleset only. We believe that a better approach to ...
Lawrence Teo, Gail-Joon Ahn, Yuliang Zheng
DAC
2010
ACM
15 years 5 months ago
On the costs and benefits of stochasticity in stream processing
With the end of clock-frequency scaling, parallelism has emerged as the key driver of chip-performance growth. Yet, several factors undermine efficient simultaneous use of onchip ...
Raj R. Nadakuditi, Igor L. Markov