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MICRO
2007
IEEE
108views Hardware» more  MICRO 2007»
15 years 8 months ago
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators
This paper describes FAST, a novel simulation methodology that can produce simulators that (i) are orders of magnitude faster than comparable simulators, (ii) are cycleaccurate, (...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...
WOSP
2004
ACM
15 years 7 months ago
Collecting whole-system reference traces of multiprogrammed and multithreaded workloads
The simulated evaluation of memory management policies relies on reference traces—logs of memory operations performed by running processes. No existing approach to reference tra...
Scott F. Kaplan
106
Voted
DAS
2006
Springer
15 years 5 months ago
Combining Multiple Classifiers for Faster Optical Character Recognition
Traditional approaches to combining classifiers attempt to improve classification accuracy at the cost of increased processing. They may be viewed as providing an accuracy-speed tr...
Kumar Chellapilla, Michael Shilman, Patrice Simard
SIGSOFT
2005
ACM
16 years 2 months ago
CHARMY: an extensible tool for architectural analysis
Charmy is a framework for designing and validating architectural specifications. In the early stages of the software development process, the Charmy framework assists the software...
Paola Inverardi, Henry Muccini, Patrizio Pelliccio...
DAC
2002
ACM
16 years 2 months ago
A universal technique for fast and flexible instruction-set architecture simulation
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance ...
Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rain...