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ISCA
1993
IEEE
137views Hardware» more  ISCA 1993»
15 years 5 months ago
Architectural Support for Translation Table Management in Large Address Space Machines
Virtual memoy page translation tables provide mappings from virtual to physical addresses. When the hardware controlled Tratmlation L.ookaside Buffers (TLBs) do not contain a tran...
Jerome C. Huck, Jim Hays
CODES
2011
IEEE
14 years 1 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
OOPSLA
2010
Springer
14 years 11 months ago
Towards a tool-based development methodology for sense/compute/control applications
This poster presents a design language and a tool suite covering the development life-cycle of a Sense/Compute/Control (SCC) application. This language makes it possible to define...
Damien Cassou, Julien Bruneau, Julien Mercadal, Qu...
CODES
2010
IEEE
14 years 11 months ago
Dynamic, non-linear cache architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, algorithm-heavy, memory-intensive applications that were originally designed and coded for generalpurpos...
Garo Bournoutian, Alex Orailoglu
MSWIM
2005
ACM
15 years 7 months ago
Huginn: a 3D visualizer for wireless ns-2 traces
Discrete-event network simulation is a major tool for the research and development of mobile ad-hoc networks (MANETs). These simulations are used for debugging, teaching, understa...
Björn Scheuermann, Holger Füßler, ...