496 search results - page 20 / 100 » Using the Temporal Logic RDL for Design Specifications |
104
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FASE
2008
Springer
14 years 11 months ago
2008
Springer
We introduce a logical verification framework for checking functional properties of service-oriented applications formally specified using the service specification language COWS. ...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
The continuous minituarization of integrated circuits may reach atomic scales in a couple of decades. Some researchers have already built simple computation engines by manipulatin...
RSP
2005
IEEE
15 years 3 months ago
2005
IEEE
For cost-effective prototyping, system designers should have a clear understanding of the intended use of the prototype under development. This paper describes a classification of...
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DAC
2010
ACM
15 years 1 months ago
2010
ACM
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...
CONCUR
1990
Springer
15 years 1 months ago
1990
Springer
In this paper we describe the calculus TCCS, an extension of the process algebra CCS with temporal constructs. The calculus is useful for the formal analysis of the timing aspects...