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FPL
1997
Springer
130views Hardware» more  FPL 1997»
15 years 1 months ago
Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research
: The paper first proposes requirements for an ideal platform for codesign research. A new board developed at Imperial College, the Riley-2, is shown to meet these requirements. It...
Patrick I. Mackinlay, Peter Y. K. Cheung, Wayne Lu...
DAC
1996
ACM
15 years 1 months ago
VAMP: A VHDL-Based Concept for Accurate Modeling and Post Layout Timing Simulation of Electronic Systems
This paper presents a new concept for accurate modeling and timing simulationof electronicsystems integrated in a typical VHDL design environment, taking into account the requirem...
Bernhard Wunder, Gunther Lehmann, Klaus D. Mü...
EURODAC
1994
IEEE
94views VHDL» more  EURODAC 1994»
15 years 1 months ago
A Study of Undetectable Non-Feedback Shorts for the Purpose of Physical-DFT
Undetectable shorts may decrease the long term reliability of a circuit, cause intermittent failures, add noise and delay, or increase test pattern generation costs. This paper de...
Richard McGowen, F. Joel Ferguson
EURODAC
1994
IEEE
129views VHDL» more  EURODAC 1994»
15 years 1 months ago
Synthesis of Self-Testable Controllers
The paper presents a synthesis approach for pipelinelike controller structures. These structures allow to implement a built-in self-test in two sessions without any extra test reg...
Sybille Hellebrand, Hans-Joachim Wunderlich
EURODAC
1994
IEEE
105views VHDL» more  EURODAC 1994»
15 years 1 months ago
On Design Rule Correct Maze Routing
This paper addresses the problem of design rule correct routing, i.e. the avoidance of illegal wiring patterns during routing. These illegal wiring patterns are due to the set of ...
Ed P. Huijbregts, Jos T. J. van Eijndhoven, Jochen...