352 search results - page 49 / 71 » VHDL |
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ISLPED
1998
ACM
15 years 1 months ago
1998
ACM
High-level power estimation is essential for designing complex low-power ICs. However, the lack of flexibility, or restriction to synthesizable code of previously presented high-...
GLVLSI
1997
IEEE
15 years 1 months ago
1997
IEEE
In a VHDL-based design flow for applicationspecific integrated circuits, VITAL provides a uniform methodology for developing ASIC libraries for signoff simulation. The VITAL Sta...
ICCAD
1997
IEEE
15 years 1 months ago
1997
IEEE
This paper presents the underlying methodology of Cosmos, an interactive approach for hardware software co-design capable of handling multiprocessor systems and distributed archit...
DAC
1997
ACM
15 years 1 months ago
1997
ACM
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
HICSS
1996
IEEE
15 years 1 months ago
1996
IEEE
Parallel simulation is expected to speed up simulation run time in a signi cant way. This paper describes a framework that is used to evaluate the performance of parallel simulati...