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IPPS
1996
IEEE
15 years 1 months ago
A New Approach to Pipeline FFT Processor
A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...
Shousheng He, Mats Torkelson
DAC
1996
ACM
15 years 1 months ago
Functional Verification Methodology of Chameleon Processor
- Functional verification of the new generation microprocessor developed by SGS-THOMSON Microelectronics makes extensive use of advanced technologies. This paper presents a global ...
Françoise Casaubieilh, Anthony McIsaac, Mik...
73
Voted
DAC
1996
ACM
15 years 1 months ago
RTL Emulation: The Next Leap in System Verification
ion. Production use of text-based methodology has enabled designers to capture designs of hundreds of thousands of gates using graphic ESDA tools. Source: Data Quest (Verilog/VHDL ...
Sanjay Sawant, Paul Giordano
ARCS
2006
Springer
15 years 1 months ago
Scalable and Partitionable Asynchronous Arbiter for Micro-threaded Chip Multiprocessors
Abstract. This paper presents a scalable and partitionable asynchronous bus arbiter for use with chip multiprocessors (CMP) and its corresponding pre-layout simulation results usin...
Nabil Hasasneh, Ian Bell, Chris R. Jesshope
DELTA
2004
IEEE
15 years 1 months ago
Arithmetic Transformations to Maximise the Use of Compressor Trees
Complex arithmetic computations, especially if derived from bit-level software descriptions, can be very inefficient if implemented directly in hardware (e.g., by translation of t...
Paolo Ienne, Ajay K. Verma