Sciweavers

2449 search results - page 113 / 490
» VLSI
Sort
View
ISCAS
2006
IEEE
88views Hardware» more  ISCAS 2006»
15 years 9 months ago
An aVLSI recurrent network of spiking neurons with reconfigurable and plastic synapses
Davide Badoni, Massimiliano Giulioni, Vittorio Dan...
ISCAS
2006
IEEE
70views Hardware» more  ISCAS 2006»
15 years 9 months ago
Power aware learning for class AB analogue VLSI neural network
—Recent research into artificial neural networks (ANN) has highlighted the potential of using compact analogue ANN hardware cores in embedded mobile devices, where power consumpt...
S. S. Modi, P. R. Wilson, A. D. Brown
115
Voted
ISCAS
2006
IEEE
84views Hardware» more  ISCAS 2006»
15 years 9 months ago
Programmable synaptic weights for an aVLSI network of spiking neurons
—We describe a spiking neuronal network which allows local synaptic weights to be assigned to individual synapses. In previous implementations of neuronal networks, the biases th...
Yingxue Wang, Shih-Chii Liu
ISCAS
2006
IEEE
120views Hardware» more  ISCAS 2006»
15 years 9 months ago
Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing
— This paper describes a new architecture for a cellular processor array integrated circuit, which operates in both discreteand continuous-time domains. Asynchronous propagation ...
Alexey Lopich, Piotr Dudek