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    ISCAPDCS
    2001
    112views Distributed And Parallel Com...» more  ISCAPDCS 2001»
    VLSI Photonic Ring Interconnect for Embedded Multicomputers: Architecture and Performance
    15 years 5 months ago
    VLSI Photonic Ring Interconnect for Embedded Multicomputers: Architecture and Performance
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    Roger D. Chamberlain, Mark A. Franklin, Abhijit Ma...
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    NIPS
    2004
    97views Information Technology» more  NIPS 2004»
    Sub-Microwatt Analog VLSI Support Vector Machine for Pattern Classification and Sequence Estimation
    15 years 5 months ago
    Sub-Microwatt Analog VLSI Support Vector Machine for Pattern Classification and Sequence Estimation
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    An analog system-on-chip for kernel-based pattern classification and sequence estimation is presented. State transition probabilities conditioned on input data are generated by an...
    Shantanu Chakrabartty, Gert Cauwenberghs
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    NIPS
    2001
    87views Information Technology» more  NIPS 2001»
    Stochastic Mixed-Signal VLSI Architecture for High-Dimensional Kernel Machines
    15 years 5 months ago
    Stochastic Mixed-Signal VLSI Architecture for High-Dimensional Kernel Machines
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    A mixed-signal paradigm is presented for high-resolution parallel innerproduct computation in very high dimensions, suitable for efficient implementation of kernels in image proce...
    Roman Genov, Gert Cauwenberghs
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    NIPS
    2003
    106views Information Technology» more  NIPS 2003»
    Synchrony Detection by Analogue VLSI Neurons with Bimodal STDP Synapses
    15 years 5 months ago
    Synchrony Detection by Analogue VLSI Neurons with Bimodal STDP Synapses
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    We present test results from spike-timing correlation learning experiments carried out with silicon neurons with STDP (Spike Timing Dependent Plasticity) synapses. The weight chan...
    Adria Bofill-i-Petit, Alan F. Murray
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    NIPS
    1994
    94views Information Technology» more  NIPS 1994»
    The Ni1000: High Speed Parallel VLSI for Implementing Multilayer Perceptrons
    15 years 5 months ago
    The Ni1000: High Speed Parallel VLSI for Implementing Multilayer Perceptrons
    Download  www.physics.brown.edu
    Michael P. Perrone, Leon N. Cooper
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