2449 search results - page 141 / 490 » VLSI |
106
Voted
OL
2007
15 years 3 months ago
2007
130
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TVLSI
2008
15 years 3 months ago
2008
In this paper, we study and analyze the computational complexity of the deblocking filter in H.264/AVC baseline decoder based on SimpleScalar/ARM simulator. The simulation result s...
140
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IAJIT
2010
15 years 2 months ago
2010
: This paper proposes a pipelined, systolic architecture for two- dimensional discrete Fourier transform computation which is highly concurrent. The architecture consists of two, o...
154
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CLEIEJ
2010
15 years 1 months ago
2010
A 3D circuit is the stacking of regular 2D circuits. The advances on the fabrication and packaging technologies allowed interconnecting stacked 2D circuits by using 3D vias. Howeve...
131
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VLSID
2003
IEEE
16 years 4 months ago
2003
IEEE
We consider the problem of minimizing the delay in transporting a signal across a distance in a VLSI circuit.The problem can be restated as a combined buffer insertion, buffer siz...