2449 search results - page 149 / 490 » VLSI |
115
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VLSID
2002
IEEE
16 years 4 months ago
2002
IEEE
Steiner tree is a fundamental problem in the automatic interconnect optimization for VLSI design. We present a probabilistic analysis method for constructing rectilinear Steiner t...
131
Voted
ISVLSI
2008
IEEE
15 years 10 months ago
2008
IEEE
We present methods to design programs or electronic circuits, for performing any operation on k registers of any sizes in a processor, in such a way that one uses no other working...
122
Voted
SIPS
2008
IEEE
15 years 10 months ago
2008
IEEE
In this paper we present the VLSI implementation of a high-throughput enhanced Max-log-MAP processor that supports both single-binary (SB) and double-binary (DB) convolutional tur...
132
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GLVLSI
2007
IEEE
15 years 10 months ago
2007
IEEE
In this paper, two new dual-path based area efficient loop filter circuits are proposed for Charge Pump Phase Locked Loop (CPPLL). The proposed circuits were designed in 0.25µ CS...
116
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MSE
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper summarizes two graduate-level class projects in EE201A/EE298 (VLSI Architectures and Design Methods) at the University of California, Los Angeles (UCLA). The purpose of...