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GLVLSI
2009
IEEE
201views VLSI» more  GLVLSI 2009»
15 years 7 months ago
Glitch-free design for multi-threshold CMOS NCL circuits
In this paper, a novel design is proposed for eliminating glitches and signal bounces during wake-up events that result from incorporating multi-threshold CMOS (MTCMOS) into async...
Ahmad Al Zahrani, Andrew Bailey, Guoyuan Fu, Jia D...
JUCS
2008
139views more  JUCS 2008»
15 years 4 months ago
Parallel Strategies for Stochastic Evolution
: This paper discusses the parallelization of Stochastic Evolution (StocE) metaheuristic, for a distributed parallel environment. VLSI cell placement is used as an optimization pro...
Sadiq M. Sait, Khawar S. Khan, Mustafa Imran Ali
VLSID
2010
IEEE
190views VLSI» more  VLSID 2010»
15 years 1 months ago
A Reconfigurable Architecture for Secure Multimedia Delivery
This paper introduces a reconfigurable architecture for ensuring secure and real-time video delivery through a novel parameterized construction of the Discrete Wavelet Transform (D...
Amit Pande, Joseph Zambreno
108
Voted
DFT
2008
IEEE
106views VLSI» more  DFT 2008»
15 years 10 months ago
Built-In Proactive Tuning System for Circuit Aging Resilience
VLSI circuits in nanometer VLSI technology experience significant aging effects, which are embodied by performance degradation over operation time. Although this degradation can b...
Nimay Shah, Rupak Samanta, Ming Zhang, Jiang Hu, D...
FCCM
2008
IEEE
128views VLSI» more  FCCM 2008»
15 years 10 months ago
Investigation of Programming Models for Emerging FPGA-Based High Performance Computing Systems
This work proposes a set of requirements for programming emerging FPGA-based high performance computing systems, and uses them to evaluate a number of existing parallel programmin...
Andrew W. H. House, Paul Chow