2449 search results - page 169 / 490 » VLSI |
113
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GLVLSI
1996
IEEE
15 years 8 months ago
1996
IEEE
Important layout properties of electronic designs include space requirements and interconnection lengths. A reliable interconnection length estimation is essential for improving p...
111
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VLSID
1996
IEEE
15 years 8 months ago
1996
IEEE
A technique for allocatzon and binding for data path synthesis (DPS) using a Genetic Algorithm (GA) approach has been developed. The proposed genetic algorithm uses a non-conventi...
142
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VLSID
1996
IEEE
15 years 8 months ago
1996
IEEE
The technique of mirror biasing is introduced and applied to a very high gain two stage CMOS cascode op-amp, in order to desensitize its output voltage to bias variations. Various...
127
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VLSID
1996
IEEE
15 years 8 months ago
1996
IEEE
Existing systolic architectures for the LMS algorithm with delayed coeficient adaptation have large adaptation delay and hence degraded convergence behaviour. This paper presents ...
107
Voted
VLSID
1996
IEEE
15 years 8 months ago
1996
IEEE
This paper presents VLSI/WSI designs for a recently introduced parallel architecture known as the folded cube-connected cycles (FCCC). We first discuss two layouts for the FCCC, i...