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DFT
2008
IEEE
151views VLSI» more  DFT 2008»
15 years 6 months ago
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller
This paper presents a concurrent error detection technique for the control logic of a modern microprocessor. Our method is based on execution time prediction for each instruction ...
Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris...
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
15 years 6 months ago
Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH
This paper presents the design of BORPH's file system layer for FPGA-based reconfigurable computers. BORPH provides user FPGA designs that execute as hardware processes acces...
Hayden Kwok-Hay So, Robert W. Brodersen
NIPS
2001
15 years 5 months ago
Learning Spike-Based Correlations and Conditional Probabilities in Silicon
We have designed and fabricated a VLSI synapse that can learn a conditional probability or correlation between spike-based inputs and feedback signals. The synapse is low power, c...
Aaron P. Shon, David Hsu, Chris Diorio
GLVLSI
2010
IEEE
141views VLSI» more  GLVLSI 2010»
15 years 4 months ago
Energy-efficient redundant execution for chip multiprocessors
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chi...
Pramod Subramanyan, Virendra Singh, Kewal K. Saluj...
DATE
2007
IEEE
100views Hardware» more  DATE 2007»
15 years 4 months ago
A new pipelined implementation for minimum norm sorting used in square root algorithm for MIMO-VBLAST systems
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
Zahid Khan, Tughrul Arslan, John S. Thompson, Ahme...