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VLSID
2001
IEEE
117views VLSI» more  VLSID 2001»
16 years 6 months ago
Dynamic Voltage Scheduling Using Adaptive Filtering of Workload Traces
Abstract - An adaptive approach for dynamic voltage scheduling on processors is presented based on workload prediction by filtering a trace history. The effects of update frequency...
Amit Sinha, Anantha Chandrakasan
ICCAD
2003
IEEE
113views Hardware» more  ICCAD 2003»
16 years 3 months ago
Branch Merge Reduction of RLCM Networks
— In this paper we consider the problem of finding a smaller RLCM circuit that approximately replicates the behavior (up to a certain frequency) of a given RLCM circuit. Targeted...
Bernard N. Sheehan
DFT
2009
IEEE
178views VLSI» more  DFT 2009»
16 years 28 days ago
Soft Core Embedded Processor Based Built-In Self-Test of FPGAs
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
Bradley F. Dutton, Charles E. Stroud
RECONFIG
2009
IEEE
141views VLSI» more  RECONFIG 2009»
16 years 27 days ago
Enhancing the Productivity of Radio Designers with RapidRadio
—In this paper the RapidRadio framework for signal classification and receiver deployment is discussed. The framework is a productivity enhancing tool that reduces the required ...
Jorge Surís, Adolfo Recio, Peter Athanas
DFT
2008
IEEE
103views VLSI» more  DFT 2008»
16 years 19 days ago
Arbitrary Error Detection in Combinational Circuits by Using Partitioning
The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuit...
Osnat Keren, Ilya Levin, Vladimir Ostrovsky, Beni ...