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DFT
2008
IEEE
107views VLSI» more  DFT 2008»
15 years 11 months ago
Checkpointing of Rectilinear Growth in DNA Self-Assembly
Error detection/correction techniques have been advocated for algorithmic self-assembly. Under rectilinear growth, it requires only two additional tiles, generally referred to as ...
Stephen Frechette, Yong-Bin Kim, Fabrizio Lombardi
FCCM
2008
IEEE
153views VLSI» more  FCCM 2008»
15 years 11 months ago
A SRAM-based Architecture for Trie-based IP Lookup Using FPGA
Internet Protocol (IP) lookup in routers can be implemented by some form of tree traversal. Pipelining can dramatically improve the search throughput. However, it results in unbal...
Hoang Le, Weirong Jiang, Viktor K. Prasanna
FCCM
2008
IEEE
115views VLSI» more  FCCM 2008»
15 years 11 months ago
Simultaneous Retiming and Placement for Pipelined Netlists
Although pipelining or C-slowing an FPGA-based application can potentially dramatically improve the performance, this poses a question for conventional reconfigurable architecture...
Kenneth Eguro, Scott Hauck
FCCM
2008
IEEE
177views VLSI» more  FCCM 2008»
15 years 11 months ago
Hardware Scripting in Gel
—Gel is a hardware description language that enables quick scripting of high level designs and can be easily extended to new design patterns. It is expression oriented and extrem...
Jonathan Bachrach, Dany Qumsiyeh, Mark Tobenkin
FCCM
2008
IEEE
118views VLSI» more  FCCM 2008»
15 years 11 months ago
A New Powerful Scalable Generic Multi-Standard LDPC Decoder Architecture
We propose a new powerful scalable generic parallel and modular architecture well suited to LDPC code decoding. This architecture template has been instantiated in the case of the...
François Charot, Christophe Wolinski, Nicol...