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DAC
2006
ACM
16 years 5 months ago
FLAW: FPGA lifetime awareness
Aggressive scaling of technology has an adverse impact on the reliability of VLSI circuits. Apart from increasing transient error susceptibility, the circuits also become more vul...
Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie,...
VLSID
2009
IEEE
96views VLSI» more  VLSID 2009»
16 years 5 months ago
Efficient Placement of Compressed Code for Parallel Decompression
Code compression is important in embedded systems design since it reduces the code size (memory requirement) and thereby improves overall area, power and performance. Existing res...
Xiaoke Qin, Prabhat Mishra
VLSID
2009
IEEE
99views VLSI» more  VLSID 2009»
16 years 5 months ago
Forecasting-Based Dynamic Virtual Channels Allocation for Power Optimization of Network-on-Chips
In this paper, we present a dynamic power management technique for optimizing the use of virtual channels in network on chips. The technique which is called dynamic virtual channe...
Amir-Mohammad Rahmani, Masoud Daneshtalab, Ali Afz...
VLSID
2009
IEEE
170views VLSI» more  VLSID 2009»
16 years 5 months ago
Code Transformations for TLB Power Reduction
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivasta...
VLSID
2009
IEEE
130views VLSI» more  VLSID 2009»
16 years 5 months ago
Reversible Logic Synthesis with Output Permutation
Synthesis of reversible logic has become a very important research area. In recent years several algorithms ? heuristic as well as exact ones ? have been introduced in this area. ...
Daniel Große, Gerhard W. Dueck, Robert Wille...