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2449
search results - page 48 / 490
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VLSI
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GLVLSI
1996
IEEE
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GLVLSI 1996
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Formal Verification of an ATM Switch Fabric using Multiway Decision Graphs
15 years 1 months ago
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users.encs.concordia.ca
Sofiène Tahar, Zijian Zhou, Xiaoyu Song, Ed...
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63
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VLSID
1996
IEEE
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VLSID 1996
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Characteristic polynomial method for verification and test of combinational circuits
15 years 1 months ago
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www.eng.auburn.edu
Vishwani D. Agrawal, David Lee
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DFT
1993
IEEE
93
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DFT 1993
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Layout Level Design for Testability Strategy Applied to a CMOS Cell Library
15 years 1 months ago
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doc.utwente.nl
M. Rullán, F. C. Blom, J. Oliver, C. Ferrer
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71
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DFT
1994
IEEE
157
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DFT 1994
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An Approach to the Development of a IDDQ Testable Cell Library
15 years 1 months ago
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pmos.upc.es
C. Ferrer, D. Dateo, J. Oliver, Antonio Rubio, M. ...
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49
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VLSID
2010
IEEE
143
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VLSID 2010
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Synchronization of Concurrently-Implemented Fluidic Operations in Pin-Constrained Digital Microfluidic Biochips
15 years 1 months ago
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people.ee.duke.edu
Yang Zhao, Ryan Sturmer, Krishnendu Chakrabarty, V...
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