1663 search results - page 197 / 333 » Validation and Verification of Simulation Models |
113
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ICASSP
2008
IEEE
15 years 11 months ago
2008
IEEE
We study time delay estimation (TDE) on parallel channels with flat fading. Several models for the channel gains are considered, and for each case we present the the maximum like...
144
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PATMOS
2005
Springer
15 years 10 months ago
2005
Springer
In this paper, we present a low power high temperature 80C51 microcontroller. The low power optimizations are applied at gate and architectural level, by using extensive clock and ...
122
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HAPTICS
2010
IEEE
15 years 9 months ago
2010
IEEE
In this paper we analyze the transparency of the generalized scattering transformation applied to teleoperation systems with constant time delay. Particularly, the human operator, ...
126
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DATE
2000
IEEE
15 years 8 months ago
2000
IEEE
Capacitance coupling can have a significant impact on gate delay in today's deep submicron circuits. In this paper we present a static timing analysis tool that calculates th...
103
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DAC
1996
ACM
15 years 8 months ago
1996
ACM
This paper presents a methodology suited for high frequency analog IC design. The use of a top-down method with AHDL for circuit designers is proposed. In order to accelerate the ...