809 search results - page 19 / 162 » Variations in Cache Behavior |
118
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RTAS
2006
IEEE
15 years 5 months ago
2006
IEEE
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
MASCOTS
1998
15 years 1 months ago
1998
As the processor-memory performance gap continues to grow, so does the need for effective tools and metrics to guide the design of efficient memory hierarchies to bridge that gap....
106
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VALUETOOLS
2006
ACM
15 years 5 months ago
2006
ACM
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
ICCD
2008
IEEE
15 years 8 months ago
2008
IEEE
— Recent studies indicate that a considerable amount of an L2 cache leakage power is dissipated in its peripheral circuits, e.g., decoders, word-lines and I/O drivers. In additio...
102
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DATE
2004
IEEE
15 years 3 months ago
2004
IEEE
In this paper, we propose an approach to estimate the Worst Case Response Time (WCRT) of tasks in a preemptive multi-tasking single-processor real-time system with a set associati...