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AES
2008
Springer
182views Cryptology» more  AES 2008»
14 years 9 months ago
Logical product models for automated scripting of process-level construction animations
Animation can add significant value to Discrete-Event Simulation by helping verify, validate, and accredit simulation analyses. This is particularly true in construction where typ...
Vineet R. Kamat
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
15 years 1 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
DAGSTUHL
2006
14 years 11 months ago
A Petri Net Approach to Verify and Debug Simulation Models
Verification and Simulation share many issues, one is that simulation models require validation and verification. In the context of simulation, verification is understood as the ta...
Peter Kemper, Carsten Tepper
EURODAC
1994
IEEE
211views VHDL» more  EURODAC 1994»
15 years 1 months ago
Advanced simulation and modeling techniques for hardware quality verification of digital systems
synchronisation also play a fundamental role in overall system robustness. ElectroMagnetic Compatibility (EMC) and ElectroMagnetic Interference (EMI) issues also have to be conside...
S. Forno, Stephen Rochel
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
15 years 6 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna