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» Verification by Abstract Interpretation
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DAC
1996
ACM
15 years 9 months ago
Bit-Level Analysis of an SRT Divider Circuit
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
Randal E. Bryant
ASPDAC
2007
ACM
101views Hardware» more  ASPDAC 2007»
15 years 9 months ago
A New Methodology for Interconnect Parasitics Extraction Considering Photo-Lithography Effects
Abstract-- Due to photo-lithography effects and manufacture process variations, the actual features fabricated on the wafer are different from the designed ones. This difference ca...
Ying Zhou, Zhuo Li, Yuxin Tian, Weiping Shi, Frank...
CAV
2007
Springer
212views Hardware» more  CAV 2007»
15 years 9 months ago
A Tutorial on Satisfiability Modulo Theories
Abstract. Solvers for satisfiability modulo theories (SMT) check the satisfiability of first-order formulas containing operations from various theories such as the Booleans, bit-ve...
Leonardo Mendonça de Moura, Bruno Dutertre,...
FMCAD
2009
Springer
15 years 9 months ago
Generalized, efficient array decision procedures
Abstract--The theory of arrays is ubiquitous in the context of software and hardware verification and symbolic analysis. The basic array theory was introduced by McCarthy and allow...
Leonardo Mendonça de Moura, Nikolaj Bj&osla...
ICFEM
2007
Springer
15 years 9 months ago
Testing for Refinement in CSP
Abstract. CSP is a well-established formalism for modelling and verification of concurrent reactive systems based on refinement. Consolidated denotational models and an effective t...
Ana Cavalcanti, Marie-Claude Gaudel