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» Verification of Model Transformations
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FMCAD
2008
Springer
14 years 11 months ago
Word-Level Sequential Memory Abstraction for Model Checking
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
Per Bjesse
PPDP
2010
Springer
14 years 7 months ago
Rewrite-based verification of XML updates
We propose a model for XML update primitives of the W3C XQuery Update Facility as parameterized rewriting rules of the form: "insert an unranked tree from a regular tree lang...
Florent Jacquemard, Michaël Rusinowitch
ICCAD
2009
IEEE
159views Hardware» more  ICCAD 2009»
14 years 7 months ago
First steps towards SAT-based formal analog verification
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
FASE
2008
Springer
14 years 11 months ago
A Logic of Graph Constraints
Abstract. Graph constraints were introduced in the area of graph transformation, in connection with the notion of (negative) application conditions, as a form to limit the applicab...
Fernando Orejas, Hartmut Ehrig, Ulrike Prange
CODES
2008
IEEE
14 years 11 months ago
Model checking SystemC designs using timed automata
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
Paula Herber, Joachim Fellmuth, Sabine Glesner