Sciweavers

242 search results - page 1 / 49
» Verification via Structure Simulation
Sort
View
CAV
2004
Springer
96views Hardware» more  CAV 2004»
15 years 10 months ago
Verification via Structure Simulation
Neil Immerman, Alexander Moshe Rabinovich, Thomas ...
151
Voted
EURODAC
1995
IEEE
180views VHDL» more  EURODAC 1995»
15 years 10 months ago
Integration of VHDL into a system design environment
Verification of image processing systems is mainly done on the basis of image sequence simulations. To achieve high simulation efficiency, our compiled code simulator MSIPC offers...
Ludwig Schwoerer, Matthias Lück, Hartmut Schr...