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» Verified Code Generation for Embedded Systems
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IPPS
2007
IEEE
15 years 8 months ago
Splice: A Standardized Peripheral Logic and Interface Creation Engine
Recent advancements in FPGA technology have allowed manufacturers to place general-purpose processors alongside user-configurable logic gates on a single chip. At first glance, ...
Justin Thiel, Ron K. Cytron
ARC
2010
Springer
183views Hardware» more  ARC 2010»
15 years 2 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
126
Voted
CODES
2008
IEEE
15 years 3 months ago
Performance debugging of Esterel specifications
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based...
Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samar...
DATE
2009
IEEE
189views Hardware» more  DATE 2009»
15 years 8 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
ISORC
2000
IEEE
15 years 6 months ago
Architecture, Design Methodology, and Component-Based Tools for a Real-Time Inspection System
We describe a real-time, component-based system for an inspection application. We chose the inspection application and the accompanying task (or scenario) so that we might fully e...
John Albert Horst