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    ISCAS
    1999
    IEEE
    95views Hardware» more  ISCAS 1999»
    VLSI circuits with fractal layout for spatial image decorrelation
    15 years 1 months ago
    VLSI circuits with fractal layout for spatial image decorrelation
    Download  www.disi.unige.it
    Stefano Rovetta, Rodolfo Zunino
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    69
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    VTS
    1999
    IEEE
    88views Hardware» more  VTS 1999»
    Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits
    15 years 1 months ago
    Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits
    Download  historical.ncstrl.org
    Andreas G. Veneris, Ibrahim N. Hajj, Srikanth Venk...
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    44
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    ITC
    1998
    IEEE
    68views Hardware» more  ITC 1998»
    A tree-structured LFSR synthesis scheme for pseudo-exhaustive testing of VLSI circuits
    15 years 1 months ago
    A tree-structured LFSR synthesis scheme for pseudo-exhaustive testing of VLSI circuits
    Download  cad63.cs.nthu.edu.tw
    Wen-Ben Jone, Jiann-Chyi Rau, Shih-Chieh Chang, Yu...
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    ISCAS
    1993
    IEEE
    86views Hardware» more  ISCAS 1993»
    Clock Distribution Design in VLSI Circuits. An Overview
    15 years 1 months ago
    Clock Distribution Design in VLSI Circuits. An Overview
    Download  www.ece.uc.edu
    Eby G. Friedman
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    ISCAS
    1994
    IEEE
    70views Hardware» more  ISCAS 1994»
    Improved Delay and Current Models for Estimating Maximum Currents in CMOS VLSI Circuits
    15 years 1 months ago
    Improved Delay and Current Models for Estimating Maximum Currents in CMOS VLSI Circuits
    Download  www.eecg.toronto.edu
    Harish Kriplani, Farid N. Najm, Ibrahim N. Hajj
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