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ICCAD
2003
IEEE
198views Hardware» more  ICCAD 2003»
16 years 5 days ago
A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
Santanu Mahapatra, Kaustav Banerjee, Florent Pegeo...
151
Voted
QEST
2006
IEEE
15 years 9 months ago
Compositional Performability Evaluation for STATEMATE
Abstract— This paper reports on our efforts to link an industrial state-of-the-art modelling tool to academic state-of-the-art analysis algorithms. In a nutshell, we enable timed...
Eckard Böde, Marc Herbstritt, Holger Hermanns...
SIGADA
2007
Springer
15 years 9 months ago
AADL modeling and analysis of hierarchical schedulers
A system based on a hierarchical scheduler is a system in which the processor is shared between several collaborative schedulers. Such schedulers exist since 1960 and they are bec...
Frank Singhoff, Alain Plantec
NN
2008
Springer
169views Neural Networks» more  NN 2008»
15 years 3 months ago
Modeling a flexible representation machinery of human concept learning
dely acknowledged that categorically organized abstract knowledge plays a significant role in high-order human cognition. Yet, there are many unknown issues about the nature of ho...
Toshihiko Matsuka, Yasuaki Sakamoto, Arieta Chouch...
154
Voted
DSN
2011
IEEE
14 years 3 months ago
Modeling time correlation in passive network loss tomography
—We consider the problem of inferring link loss rates using passive measurements. Prior inference approaches are mainly built on the time correlation nature of packet losses. How...
Jin Cao, Aiyou Chen, Patrick P. C. Lee