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» Versatile Imaging Architecture Based on a System on Chip
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HPCA
2002
IEEE
16 years 4 days ago
CableS: Thread Control and Memory Management Extensions for Shared Virtual Memory Clusters
Clusters of high-end workstations and PCs are currently used in many application domains to perform large-scale computations or as scalable servers for I/O bound tasks. Although c...
Peter Jamieson, Angelos Bilas
FPL
2004
Springer
74views Hardware» more  FPL 2004»
15 years 5 months ago
A Structured Methodology for System-on-an-FPGA Design
Abstract. Increasing logic resources coupled with a proliferation of integrated performance enhancing primitives in high-end FPGAs results in an increased design complexity which r...
N. Pete Sedcole, Peter Y. K. Cheung, George A. Con...
FPGA
2009
ACM
343views FPGA» more  FPGA 2009»
15 years 6 months ago
Fpga-based face detection system using Haar classifiers
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
JUCS
2007
104views more  JUCS 2007»
14 years 11 months ago
Real-time Architecture for Robust Motion Estimation under Varying Illumination Conditions
: Motion estimation from image sequences is a complex problem which requires high computing resources and is highly affected by changes in the illumination conditions in most of th...
Javier Díaz, Eduardo Ros, Rafael Rodr&iacut...
ENGL
2008
100views more  ENGL 2008»
14 years 12 months ago
HIDE+: A Logic Based Hardware Development Environment
With the advent of System-On-Chip (SOC) technology, there is a pressing need to enhance the quality of ools available and increase the level of abstraction at which hardware is des...
Abdsamad Benkrid, Khaled Benkrid