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» Versatile Imaging Architecture Based on a System on Chip
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CODES
2010
IEEE
14 years 9 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
ICDAR
2009
IEEE
15 years 6 months ago
Graphic Symbol Recognition Using Graph Based Signature and Bayesian Network Classifier
We present a new approach for recognition of complex graphic symbols in technical documents. Graphic symbol recognition is a well known challenge in the field of document image an...
Muhammad Muzzamil Luqman, Thierry Brouard, Jean-Yv...
ICCV
2009
IEEE
16 years 4 months ago
Keyframe-Based Real-Time Camera Tracking
We present a novel keyframe selection and recognition method for robust markerless real-time camera tracking. Our system contains an ofine module to select features from a grou...
Zilong Dong, Guofeng Zhang, Jiaya Jia, Hujun Bao
DSD
2010
IEEE
190views Hardware» more  DSD 2010»
15 years 17 hour ago
Hardware-Based Speed Up of Face Recognition Towards Real-Time Performance
— Real-time face recognition by computer systems is required in many commercial and security applications because it is the only way to protect privacy and security in the sea of...
I. Sajid, Sotirios G. Ziavras, M. M. Ahmed
ESANN
2006
15 years 1 months ago
FPGA implementation of an integrate-and-fire LEGION model for image segmentation
Abstract. Despite several previous studies, little progress has been made in building successful neural systems for image segmentation in digital hardware. Spiking neural networks ...
Bernard Girau, Cesar Torres-Huitzil