717 search results - page 60 / 144 » Virtual Circuit Switching |
100
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ICCAD
2002
IEEE
15 years 8 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
DATE
2002
IEEE
15 years 4 months ago
2002
IEEE
Transistor tapering is a widely used technique applied to optimize the geometries of CMOS transistors in highperformance circuit design with a view to minimizing the delay of a FE...
103
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ICCAD
1995
IEEE
15 years 2 months ago
1995
IEEE
In this paper we investigate activity-driven clock trees to reduce the dynamic power consumption of synchronous digital CMOS circuits. Sections of an activity-driven clock tree ca...
100
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ICCAD
2001
IEEE
15 years 8 months ago
2001
IEEE
—In this paper, we present an approach to nonlinear model reduction based on representing a nonlinear system with a piecewise-linear system and then reducing each of the pieces w...
112
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FPGA
2009
ACM
15 years 6 months ago
2009
ACM
Via-programmable gate arrays (VPGAs) offer a middle ground between application specific integrated circuits and field programmable gate arrays in terms of flexibility, manufac...