736 search results - page 11 / 148 » Virtual Memory: Issues of Implementation |
AHS
2006
IEEE
15 years 4 months ago
2006
IEEE
This paper presents a new approach in realizing Virtual Channels tailored for Network on Chip implementations. The technique makes use of a flow control mechanism based on adaptiv...
APCSAC
2001
IEEE
15 years 1 months ago
2001
IEEE
We present a framework that allows applications to build and customize VM services on the L4 microkernel. While the L4 microkernel's abstractions are quite powerng these abst...
170
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ISCA
2012
IEEE
13 years 10 days ago
2012
IEEE
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
103
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EMSOFT
2007
Springer
15 years 4 months ago
2007
Springer
The emergence of standards for programming real-time systems in Java has encouraged many developers to consider its use for systems previously only built using C, Ada, or assembly...
ICECCS
2010
IEEE
14 years 10 months ago
2010
IEEE
Abstract—Transactional Memory (TM) is a promising technique that addresses the difficulty of parallel programming. Since TM takes responsibility for all concurrency control, TM ...