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HPCA
2009
IEEE
14 years 6 months ago
Elastic-buffer flow control for on-chip networks
This paper presents elastic buffers (EBs), an efficient flow-control scheme that uses the storage already present in pipelined channels in place of explicit input virtualchannel b...
George Michelogiannakis, James D. Balfour, William...
SC
1993
ACM
13 years 10 months ago
Optimal fully adaptive wormhole routing for meshes
A deadlock-free fully adaptive routing algorithm for 2D meshes which is optimal in the number of virtual channels required and in the number of restrictions placed on the use of t...
Loren Schwiebert, D. N. Jayasimha
CCR
2006
92views more  CCR 2006»
13 years 6 months ago
Flow labelled IP over ATM: design and rationale
We describe a system in which layer 2 switching is placed directly under the control of layer 3 routing protocols on a hop-by-hop basis. Specifically, ATM switching is controlled ...
Greg Minshall, Robert M. Hinden, Eric Hoffman, Fon...
JSS
2006
104views more  JSS 2006»
13 years 6 months ago
Modelling and simulation of off-chip communication architectures for high-speed packet processors
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
Jacob Engel, Daniel Lacks, Taskin Koçak
HOTI
2008
IEEE
14 years 22 days ago
NoC with Near-Ideal Express Virtual Channels Using Global-Line Communication
As processor core counts increase, networks-on-chip (NoCs) are becoming an increasingly popular interconnection fabric due to their ability to supply high bandwidth. However, NoCs...
Tushar Krishna, Amit Kumar 0002, Patrick Chiang, M...