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126
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IPPS
1998
IEEE
15 years 8 months ago
PACE: Processor Architectures for Circuit Emulation
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
Reiner Kolla, Oliver Springauf
138
Voted
IPPS
2005
IEEE
15 years 9 months ago
Performance Implications of Periodic Checkpointing on Large-Scale Cluster Systems
Large-scale systems like BlueGene/L are susceptible to a number of software and hardware failures that can affect system performance. Periodic application checkpointing is a commo...
Adam J. Oliner, Ramendra K. Sahoo, José E. ...
VECPAR
2000
Springer
15 years 7 months ago
A SCOOPP Evaluation on Packing Parallel Objects in Run-Time
The SCOOPP (Scalable Object Oriented Parallel Programming) system is an hybrid compile and run-time system. SCOOPP dynamically scales OO applications on a wide range of target plat...
João Luís Sobral, Alberto José...
ICS
1999
Tsinghua U.
15 years 8 months ago
Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity
Current high-end parallel systems achieve low-latency, highbandwidth network communication through the use of aggressive design techniques and expensive mechanical and electrical ...
José F. Martínez, Josep Torrellas, J...
IPPS
2010
IEEE
15 years 2 months ago
Highly scalable parallel sorting
Sorting is a commonly used process with a wide breadth of applications in the high performance computing field. Early research in parallel processing has provided us with comprehen...
Edgar Solomonik, Laxmikant V. Kalé