Sciweavers

564 search results - page 56 / 113
» Wireplanning in logic synthesis
Sort
View
HYBRID
2000
Springer
15 years 1 months ago
Decidable Controller Synthesis for Classes of Linear Systems
A problem of great interest in the control of hybrid systems is the design of least restrictive controllers for reachability specifications. Controller design typically uses game t...
Omid Shakernia, Shankar Sastry, George J. Pappas
LOPSTR
2004
Springer
15 years 3 months ago
Graph-Based Proof Counting and Enumeration with Applications for Program Fragment Synthesis
For use in earlier approaches to automated module interface adaptation, we seek a restricted form of program synthesis. Given some typing assumptions and a desired result type, we ...
J. B. Wells, Boris Yakobowski
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 2 months ago
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
Jordi Cortadella, Michael Kishinevsky, Steven M. B...
77
Voted
DAC
1996
ACM
15 years 1 months ago
A Register File and Scheduling Model for Application Specific Processor Synthesis
In this paper, we outline general design steps of our synthesis tool to realize application specific co-processors such that for a given scientific application having intensive ite...
Ehat Ercanli, Christos A. Papachristou
ICCAD
1994
IEEE
127views Hardware» more  ICCAD 1994»
15 years 1 months ago
Synthesis of concurrent system interface modules with automatic protocol conversion generation
-- We describe a new high-level compiler called Integral fordesigning system interface modules. The inputis a high-levelconcurrent algorithmic specification that can model complex ...
Bill Lin, Steven Vercauteren