564 search results - page 60 / 113 » Wireplanning in logic synthesis |
DELTA
2006
IEEE
15 years 1 months ago
2006
IEEE
The difficulties of designing nanoscale circuits include the need for regular circuit structure and controlling the timing requirements. A cellular array has highly regular struct...
FPL
2000
Springer
15 years 1 months ago
2000
Springer
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...
VLSID
2009
IEEE
15 years 4 months ago
2009
IEEE
Abstract— This paper introduces a fuzzy logic based guidance architecture to a graph grammar framework for automated design of analog circuits. The grammar generates circuit topo...
101
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FPL
2006
Springer
15 years 1 months ago
2006
Springer
This paper presents a novel tool flow combining rewriting logic with hardware synthesis. It enables the automated generation of synthesizable VHDL code from mathematical equations...
108
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ITCC
2002
IEEE
15 years 2 months ago
2002
IEEE
: Since modern programmable devices contain embedded memory blocks, there exists a possibility to implement Finite State Machines (FSM) using such blocks. The size of the memory av...