2035 search results - page 283 / 407 » Working memory |
123
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ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
16 years 1 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
131
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CVPR
2010
IEEE
15 years 11 months ago
2010
IEEE
We propose interest seam image, an efficient visual synopsis for video. To extract an interest seam image, a spatiotemporal energy map is constructed for the target video shot. T...
168
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PDP
2010
IEEE
15 years 11 months ago
2010
IEEE
—This work presents a study undertaken to characterise the behaviour of some parallelisation techniques for irregular codes, previously developed for SMP architectures, on a seve...
106
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EDBT
2010
ACM
15 years 11 months ago
2010
ACM
With the advent of next-generation DNA sequencing machines, there is an increasing need for the development of computational tools that can anchor accurately and expediently the m...
152
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ACSAC
2009
IEEE
15 years 11 months ago
2009
IEEE
Abstract—The traditional virtual machine usage model advocates placing security mechanisms in a trusted VM layer and letting the untrusted guest OS run unaware of the presence of...