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JSS
2008
91views more  JSS 2008»
15 years 3 months ago
A parametrized algorithm that implements sequential, causal, and cache memory consistencies
In this paper, we present an algorithm that can be used to implement sequential, causal, or cache consistency in distributed shared memory (DSM) systems. For this purpose it inclu...
Ernesto Jiménez, Antonio Fernández, ...
IJPP
2002
107views more  IJPP 2002»
15 years 2 months ago
Efficiently Adapting Java Binaries in Limited Memory Contexts
This paper presents a compilation framework that allows executable code to be shared across different Java Virtual Machine (JVM) instances. All fully compliant JVMs that target se...
Pramod G. Joisha, Samuel P. Midkiff, Mauricio J. S...
HPCA
2011
IEEE
14 years 7 months ago
Essential roles of exploiting internal parallelism of flash memory based solid state drives in high-speed data processing
Flash memory based solid state drives (SSDs) have shown a great potential to change storage infrastructure fundamentally through their high performance and low power. Most recent ...
Feng Chen, Rubao Lee, Xiaodong Zhang
ISCA
2012
IEEE
333views Hardware» more  ISCA 2012»
13 years 5 months ago
Reducing memory reference energy with opportunistic virtual caching
Most modern cores perform a highly-associative translation look aside buffer (TLB) lookup on every memory access. These designs often hide the TLB lookup latency by overlapping it...
Arkaprava Basu, Mark D. Hill, Michael M. Swift
ISCA
2007
IEEE
174views Hardware» more  ISCA 2007»
15 years 9 months ago
An integrated hardware-software approach to flexible transactional memory
There has been considerable recent interest in the support of transactional memory (TM) in both hardware and software. We present an intermediate approach, in which hardware is us...
Arrvindh Shriraman, Michael F. Spear, Hemayet Hoss...