63 search results - page 12 / 13 » Wrapper design for embedded core test |
101
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GECCO
2004
Springer
15 years 2 months ago
2004
Springer
Abstract. The need for effective testing techniques for architectural level descriptions is widely recognised. However, due to the variety of domain-specific architectural descript...
111
Voted
DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
Abstract—Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may...
ITC
2003
IEEE
15 years 2 months ago
2003
IEEE
Embedded memories are among the most widely used cores in current system-on-chip (SOC) implementations. Memory cores usually occupy a significant portion of the chip area, and do...
106
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DAC
2006
ACM
14 years 11 months ago
2006
ACM
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
SAMOS
2005
Springer
15 years 3 months ago
2005
Springer
The design of appropriate communication architectures for complex Systems-on-Chip (SoC) is a challenging task. One promising alternative to solve these problems are Networks-on-Chi...