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CADE
2005
Springer
16 years 7 months ago
Proof Planning for First-Order Temporal Logic
Proof planning is an automated reasoning technique which improves proof search by raising it to a meta-level. In this paper we apply proof planning to First-Order Linear Temporal L...
Claudio Castellini, Alan Smaill
ICCD
2004
IEEE
128views Hardware» more  ICCD 2004»
16 years 4 months ago
Static Transition Probability Analysis Under Uncertainty
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
Siddharth Garg, Siddharth Tata, Ravishankar Arunac...
ICCAD
2004
IEEE
94views Hardware» more  ICCAD 2004»
16 years 3 months ago
Timing macro-modeling of IP blocks with crosstalk
With the increase of design complexities and the decrease of minimal feature sizes, IP reuse is becoming a common practice while crosstalk is becoming a critical issue that must b...
Ruiming Chen, Hai Zhou
CVPR
2010
IEEE
16 years 3 months ago
Moving Vistas: Exploiting Motion for Describing Scenes
Scene recognition in an unconstrained setting is an open and challenging problem with wide applications. In this paper, we study the role of scene dynamics for improved representa...
Nitesh Shroff, Pavan Turaga, Rama Chellappa
ASPLOS
2010
ACM
16 years 1 months ago
Specifying and dynamically verifying address translation-aware memory consistency
Computer systems with virtual memory are susceptible to design bugs and runtime faults in their address translation (AT) systems. Detecting bugs and faults requires a clear speci...
Bogdan F. Romanescu, Alvin R. Lebeck, Daniel J. So...
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