35 search results - page 3 / 7 » Yield modelling and Yield Enhancement for FPGAs using Fault ... |
FPL
2005
Springer
13 years 11 months ago
2005
Springer
SRAM-based FPGAs have an inherent capacity for defect tolerance. We propose a simple scheme that exploits this potential in multiple-FPGA systems. The symmetry of the system is ex...
ICCAD
2008
IEEE
14 years 3 months ago
2008
IEEE
— Three-dimensional die stacking integration provides the ability to stack multiple layers of processed silicon with a large number of vertical interconnects. Through Silicon Via...
TC
2010
13 years 4 months ago
2010
—The number of CPUs in chip multiprocessors is growing at the Moore’s Law rate, due to continued technology advances. However, new technologies pose serious reliability challen...
DSN
2005
IEEE
13 years 12 months ago
2005
IEEE
Designing a distributed fault tolerance algorithm requires careful analysis of both fault models and diagnosis strategies. A system will fail if there are too many active faults, ...
FPGA
2009
ACM
14 years 1 months ago
2009
ACM
Aggressive scaling increases the number of devices we can integrate per square millimeter but makes it increasingly difficult to guarantee that each device fabricated has the inte...