1000 search results - page 127 / 200 » Yield-Aware Cache Architectures |
ISPASS
2008
IEEE
15 years 4 months ago
2008
IEEE
Many programs go through phases as they execute. Knowing where these phases begin and end can be beneficial. For example, adaptive architectures can exploit such information to lo...
DEXAW
2000
IEEE
15 years 2 months ago
2000
IEEE
This paper compares different selected and representative parallel video servers, including our server SESAMEKB, by the means of their architectural design, striping, scheduling, ...
HPCA
2002
IEEE
15 years 10 months ago
2002
IEEE
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
VLSID
2001
IEEE
15 years 10 months ago
2001
IEEE
Memory represents a major bottleneck in modern embedded systems. Traditionally, memory organizationsfor programmable systems assumed a fixed cache hierarchy. Withthe wideningproce...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
The concept of a SOC platform architecture introduces the concept of a communication infrastructure. In the transaction-level a finite set of architecture components (memories, ar...