711 search results - page 69 / 143 » Yield-aware placement optimization |
105
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GLVLSI
2005
IEEE
15 years 9 months ago
2005
IEEE
The dependence of the propagation delay of the interlayer 3-D interconnects on the vertical through via location and length is investigated. For a variable vertical through via lo...
129
Voted
FCCM
2002
IEEE
15 years 8 months ago
2002
IEEE
C-slow retiming (changing a design to support multiple instances of a computation) and datapath-aware placement have long been advocated by members of the FPGA synthesis community...
106
Voted
HICSS
2000
IEEE
15 years 7 months ago
2000
IEEE
Recent improvements in fuel cell technology along with an increasing demand for small generator units have led to renewed interest in dispersed generation units. This work demonst...
125
Voted
VLSID
2007
IEEE
15 years 9 months ago
2007
IEEE
As the VLSI technology scales towards the nanometer regime, circuit performance is increasingly affected by variations. These variations need to be considered at an early stage in...
114
Voted
DATE
2006
IEEE
15 years 9 months ago
2006
IEEE
— Embedded multiprocessors pose new challenges in the design and implementation of embedded software. This has led to the need for programming interfaces that expose the capabili...