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aspdac 2000
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Hierarchical computation of 3-D interconnect capacitance using direct boundary element method
15 years 8 months ago
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Jiangchun Gu, Zeyi Wang, Xianlong Hong
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IBAW: an implication-tree based alternative-wiring logic transformation algorithm
15 years 9 months ago
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cadlab.cs.ucla.edu
Wangning Long, Yu-Liang Wu, Jinian Bian
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Causality based generation of directed test cases
15 years 9 months ago
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Nina Saxena, Jacob A. Abraham, Avijit Saha
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Hardware-software cosynthesis for run-time incrementally reconfigurable FPGAs
15 years 9 months ago
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Byungil Jeong, Sungjoo Yoo, Sunghyun Lee, Kiyoung ...
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Self-reforming routing for stochastic search in VLSI interconnection layout
15 years 9 months ago
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Yukiko Kubo, Yasuhiro Takashima, Shigetoshi Nakata...
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