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57
Voted
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
It has been shown that Binary Decision Diagram (BDD) based logic synthesis enjoys faster runtime than the classic logic synthesis systems based on Sum of Product (SOP) form. Howev...
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
In this paper we propose a fault-tolerant processor architecture and an associated fault-tolerant computation model capable of fault tolerance in the nanoelectronic environment th...
71
Voted
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
We extend an existing probabilistic congestion model to consider shielding for crosstalk reduction. We then develop a multilevel router to study the impact of various congestion m...
ASPDAC
2005
ACM
15 years 3 months ago
2005
ACM
— In this paper we present new lower bounds on BDD size. These lower bounds are derived from more general lower bounds that recently were given in the context of exact BDD minimi...
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
Structured ASICs present an attractive alternative to reducing design costs and turnaround times in nanometer designs. As with conventional ASICs, such designs require global wire...